//将实时转换的数字结果通过串口传输到PC上

module adc_top

    (

        clk,

        rst,

        ad_cs_out,//--TLC549片选信号

        ad_clk_out,//--TLC549时钟信号

        ad_data_in,//--TLC549数字的输入

        txd_out   //--串口输出

    );

input clk,rst,ad_data_in;

output ad_cs_out,ad_clk_out,txd_out;

reg ad_cs_out,ad_clk_out;

wire clk_100k,txd_out;

reg [:] cnt;

reg [:] addata;

wire TxClk,TxFinish;

reg XmitPlus;

//416分频的,产生115200的时钟

defparam Gen_RxClk.divdFACTOR=,Gen_RxClk.divdWIDTH=;//分频时钟

gen_divd Gen_RxClk(.reset(rst),.clkin(clk),.clkout(TxClk));//端口名称关联

//480分频的,产生100k的时钟

defparam Gen_100k.divdFACTOR=,Gen_100k.divdWIDTH=;//分频时钟

gen_divd Gen_100k(.reset(rst),.clkin(clk),.clkout(clk_100k));//端口名称关联

//串口发送

uart_t UartTx(.Bclk(TxClk),.Resett(rst),.Txd(txd_out),

                .XmitCmdp(XmitPlus),.TxdBuf(addata),.TxDone(TxFinish));

always @(posedge clk_100k or negedge rst)

begin

    if(!rst)

        begin

            cnt<='d0;

            ad_cs_out<='b1;

            ad_clk_out<='b0;

            XmitPlus<='b0;

        end

    else

        begin

            cnt<=cnt+'b1;

            case(cnt)

                :begin ad_cs_out<='b0;ad_clk_out<=1'b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_clk_out<='b1;end

                :begin addata[]<=ad_data_in;ad_clk_out<='b0;end

                :begin ad_cs_out<='b1;end//--拉高CS,等待ADC内部转换，时间<=17us

                //18:;

                //19:;

                //20:;

                :begin XmitPlus<='b1; end

                //22:;

                :begin XmitPlus<='b0;end

                :

                    begin

                        if(TxFinish=='b1)//等待发送完成

                            cnt<='d31;//发送完成，再按一次复位键,重新一次转换发送

                        else

                            cnt<='d30;

                    end

                default:;

            endcase

        end

end

endmodule