下面的代码译码出指令的立即数，不同的指令有不同的立即数编码形式。

//I类型指令的imm，[31:20]，符号位扩展成32位。

wire [31:0]  rv32_i_imm = {

                                {20{rv32_instr[31]}}

                               , rv32_instr[31:20]

                              };

 //S类型指令的立即数

  wire [31:0]  rv32_s_imm = {

                                {20{rv32_instr[31]}}

                               , rv32_instr[31:25]

                               , rv32_instr[11:7]

                              };

//B类型指令的立即数

   wire [31:0]  rv32_b_imm = {

                                {19{rv32_instr[31]}}

                               , rv32_instr[31]

                               , rv32_instr[7]

                               , rv32_instr[30:25]

                               , rv32_instr[11:8]

                               , 1'b0

                               };

//U类型指令立即数

  wire [31:0]  rv32_u_imm = {rv32_instr[31:12],12'b0};

//J类型指令立即数

  wire [31:0]  rv32_j_imm = {

                                {11{rv32_instr[31]}}

                               , rv32_instr[31]

                               , rv32_instr[19:12]

                               , rv32_instr[20]

                               , rv32_instr[30:21]

                               , 1'b0

                               };

                   // It will select i-type immediate when

                    //    * rv32_op_imm

                    //    * rv32_jalr

                    //    * rv32_load

   wire rv32_imm_sel_i = rv32_op_imm | rv32_jalr | rv32_load;

   wire rv32_imm_sel_jalr = rv32_jalr;

   wire [31:0]  rv32_jalr_imm = rv32_i_imm;

                   // It will select u-type immediate when

                    //    * rv32_lui, rv32_auipc

   wire rv32_imm_sel_u = rv32_lui | rv32_auipc;

                   // It will select j-type immediate when

                    //    * rv32_jal

   wire rv32_imm_sel_j = rv32_jal;

   wire rv32_imm_sel_jal = rv32_jal;

   wire [31:0]  rv32_jal_imm = rv32_j_imm;

                   // It will select b-type immediate when

                    //    * rv32_branch

   wire rv32_imm_sel_b = rv32_branch;

   wire rv32_imm_sel_bxx = rv32_branch;

   wire [31:0]  rv32_bxx_imm = rv32_b_imm;

                    // It will select s-type immediate when

                    //    * rv32_store

   wire rv32_imm_sel_s = rv32_store;

以下是16位指令的立即数译码，16位指令立即数比较复杂。

//   * Note: this CIS/CILI/CILUI/CI16SP-type is named by myself, because in

 //           ISA doc, the CI format for LWSP is different

//           with other CI formats in terms of immediate

// It will select CIS-type immediate when

//    * rv16_lwsp

   wire rv16_imm_sel_cis = rv16_lwsp;

   wire [31:0]  rv16_cis_imm ={

                           24'b0

                         , rv16_instr[3:2]

                         , rv16_instr[12]

                         , rv16_instr[6:4]

                         , 2'b0

                          };

   wire [31:0]  rv16_cis_d_imm ={

                           23'b0

                         , rv16_instr[4:2]

                         , rv16_instr[12]

                         , rv16_instr[6:5]

                         , 3'b0

                          };

                    // It will select CILI-type immediate when

                    //    * rv16_li

                    //    * rv16_addi

                    //    * rv16_slli

                    //    * rv16_srai

                    //    * rv16_srli

                    //    * rv16_andi

   wire rv16_imm_sel_cili = rv16_li | rv16_addi | rv16_slli

                    | rv16_srai | rv16_srli | rv16_andi;

   wire [31:0]  rv16_cili_imm ={

                           {26{rv16_instr[12]}}

                         , rv16_instr[12]

                         , rv16_instr[6:2]

                          };

                    // It will select CILUI-type immediate when

                    //    * rv16_lui

   wire rv16_imm_sel_cilui = rv16_lui;

   wire [31:0]  rv16_cilui_imm ={

                           {14{rv16_instr[12]}}

                         , rv16_instr[12]

                         , rv16_instr[6:2]

                         , 12'b0

                          };

                    // It will select CI16SP-type immediate when

                    //    * rv16_addi16sp

   wire rv16_imm_sel_ci16sp = rv16_addi16sp;

   wire [31:0]  rv16_ci16sp_imm ={

                           {22{rv16_instr[12]}}

                         , rv16_instr[12]

                         , rv16_instr[4]

                         , rv16_instr[3]

                         , rv16_instr[5]

                         , rv16_instr[2]

                         , rv16_instr[6]

                         , 4'b0

                          };

                    // It will select CSS-type immediate when

                    //    * rv16_swsp

   wire rv16_imm_sel_css = rv16_swsp;

   wire [31:0]  rv16_css_imm ={

                           24'b0

                         , rv16_instr[8:7]

                         , rv16_instr[12:9]

                         , 2'b0

                          };

   wire [31:0]  rv16_css_d_imm ={

                           23'b0

                         , rv16_instr[9:7]

                         , rv16_instr[12:10]

                         , 3'b0

                          };

                    // It will select CIW-type immediate when

                    //    * rv16_addi4spn

   wire rv16_imm_sel_ciw = rv16_addi4spn;

   wire [31:0]  rv16_ciw_imm ={

                           22'b0

                         , rv16_instr[10:7]

                         , rv16_instr[12]

                         , rv16_instr[11]

                         , rv16_instr[5]

                         , rv16_instr[6]

                         , 2'b0

                          };

                   // It will select CL-type immediate when

                    //    * rv16_lw

   wire rv16_imm_sel_cl = rv16_lw;

   wire [31:0]  rv16_cl_imm ={

                           25'b0

                         , rv16_instr[5]

                         , rv16_instr[12]

                         , rv16_instr[11]

                         , rv16_instr[10]

                         , rv16_instr[6]

                         , 2'b0

                          };

   wire [31:0]  rv16_cl_d_imm ={

                           24'b0

                         , rv16_instr[6]

                         , rv16_instr[5]

                         , rv16_instr[12]

                         , rv16_instr[11]

                         , rv16_instr[10]

                         , 3'b0

                          };

                    // It will select CS-type immediate when

                    //    * rv16_sw

   wire rv16_imm_sel_cs = rv16_sw;

   wire [31:0]  rv16_cs_imm ={

                           25'b0

                         , rv16_instr[5]

                         , rv16_instr[12]

                         , rv16_instr[11]

                         , rv16_instr[10]

                         , rv16_instr[6]

                         , 2'b0

                          };

    wire [31:0]  rv16_cs_d_imm ={

                           24'b0

                         , rv16_instr[6]

                         , rv16_instr[5]

                         , rv16_instr[12]

                         , rv16_instr[11]

                         , rv16_instr[10]

                         , 3'b0

                          };

                   // It will select CB-type immediate when

                    //    * rv16_beqz

                    //    * rv16_bnez

   wire rv16_imm_sel_cb = rv16_beqz | rv16_bnez;

   wire [31:0]  rv16_cb_imm ={

                           {23{rv16_instr[12]}}

                         , rv16_instr[12]

                         , rv16_instr[6:5]

                         , rv16_instr[2]

                         , rv16_instr[11:10]

                         , rv16_instr[4:3]

                         , 1'b0

                          };

   wire [31:0]  rv16_bxx_imm = rv16_cb_imm;

                   // It will select CJ-type immediate when

                    //    * rv16_j

                    //    * rv16_jal

   wire rv16_imm_sel_cj = rv16_j | rv16_jal;

   wire [31:0]  rv16_cj_imm ={

                           {20{rv16_instr[12]}}

                         , rv16_instr[12]

                         , rv16_instr[8]

                         , rv16_instr[10:9]

                         , rv16_instr[6]

                         , rv16_instr[7]

                         , rv16_instr[2]

                         , rv16_instr[11]

                         , rv16_instr[5:3]

                         , 1'b0

                          };

   wire [31:0]  rv16_jjal_imm = rv16_cj_imm;

                   // It will select CR-type register (no-imm) when

                    //    * rv16_jalr_mv_add

   wire [31:0]  rv16_jrjalr_imm = 32'b0;

                    // It will select CSR-type register (no-imm) when

                    //    * rv16_subxororand

   //wire [31:0]  rv32_load_fp_imm  = rv32_i_imm;

   //wire [31:0]  rv32_store_fp_imm = rv32_s_imm;

  //以下代码是通过and or逻辑实现的5路并行多路选择器

   wire [31:0]  rv32_imm =

                      ({32{rv32_imm_sel_i}} & rv32_i_imm)

                    | ({32{rv32_imm_sel_s}} & rv32_s_imm)

                    | ({32{rv32_imm_sel_b}} & rv32_b_imm)

                    | ({32{rv32_imm_sel_u}} & rv32_u_imm)

                    | ({32{rv32_imm_sel_j}} & rv32_j_imm)

                    ;

   wire  rv32_need_imm =

                      rv32_imm_sel_i

                    | rv32_imm_sel_s

                    | rv32_imm_sel_b

                    | rv32_imm_sel_u

                    | rv32_imm_sel_j

                    ;

//以下是10输入并行多路选择器，根据不同的立即数类型，选择生成16位指令的最终立即数。

  wire [31:0]  rv16_imm =

                      ({32{rv16_imm_sel_cis   }} & rv16_cis_imm)

                    | ({32{rv16_imm_sel_cili  }} & rv16_cili_imm)

                    | ({32{rv16_imm_sel_cilui }} & rv16_cilui_imm)

                    | ({32{rv16_imm_sel_ci16sp}} & rv16_ci16sp_imm)

                    | ({32{rv16_imm_sel_css   }} & rv16_css_imm)

                    | ({32{rv16_imm_sel_ciw   }} & rv16_ciw_imm)

                    | ({32{rv16_imm_sel_cl    }} & rv16_cl_imm)

                    | ({32{rv16_imm_sel_cs    }} & rv16_cs_imm)

                    | ({32{rv16_imm_sel_cb    }} & rv16_cb_imm)

                    | ({32{rv16_imm_sel_cj    }} & rv16_cj_imm)

                    ;

  wire rv16_need_imm =

                      rv16_imm_sel_cis

                    | rv16_imm_sel_cili

                    | rv16_imm_sel_cilui

                    | rv16_imm_sel_ci16sp

                    | rv16_imm_sel_css

                    | rv16_imm_sel_ciw

                    | rv16_imm_sel_cl

                    | rv16_imm_sel_cs

                    | rv16_imm_sel_cb

                    | rv16_imm_sel_cj

                    ;

   assign need_imm = rv32 ? rv32_need_imm : rv16_need_imm;

  //根据是rv32还是rv16，产生最终的立即数

  assign dec_imm = rv32 ? rv32_imm : rv16_imm;

   assign dec_pc  = i_pc;

// 根据指令类型，产生最终的信息总线。

  assign dec_info =

               ({`E203_DECINFO_WIDTH{alu_op}}     & {{`E203_DECINFO_WIDTH-`E203_DECINFO_ALU_WIDTH{1'b0}},alu_info_bus})

             | ({`E203_DECINFO_WIDTH{amoldst_op}} & {{`E203_DECINFO_WIDTH-`E203_DECINFO_AGU_WIDTH{1'b0}},agu_info_bus})

             | ({`E203_DECINFO_WIDTH{bjp_op}}     & {{`E203_DECINFO_WIDTH-`E203_DECINFO_BJP_WIDTH{1'b0}},bjp_info_bus})

             | ({`E203_DECINFO_WIDTH{csr_op}}     & {{`E203_DECINFO_WIDTH-`E203_DECINFO_CSR_WIDTH{1'b0}},csr_info_bus})

             | ({`E203_DECINFO_WIDTH{muldiv_op}}  & {{`E203_DECINFO_WIDTH-`E203_DECINFO_CSR_WIDTH{1'b0}},muldiv_info_bus})

               ;

   wire legl_ops =

               alu_op

             | amoldst_op

             | bjp_op

             | csr_op

             | muldiv_op

             ;

解码16位指令的寄存器。

  // To decode the registers for Rv16, divided into 8 groups

   wire rv16_format_cr  = rv16_jalr_mv_add;

   wire rv16_format_ci  = rv16_lwsp | rv16_flwsp | rv16_fldsp | rv16_li | rv16_lui_addi16sp | rv16_addi | rv16_slli;

   wire rv16_format_css = rv16_swsp | rv16_fswsp | rv16_fsdsp;

   wire rv16_format_ciw = rv16_addi4spn;

   wire rv16_format_cl  = rv16_lw | rv16_flw | rv16_fld;

   wire rv16_format_cs  = rv16_sw | rv16_fsw | rv16_fsd | rv16_subxororand;

   wire rv16_format_cb  = rv16_beqz | rv16_bnez | rv16_srli | rv16_srai | rv16_andi;

   wire rv16_format_cj  = rv16_j | rv16_jal;

   // In CR Cases:

   //   * JR:     rs1= rs1(coded),     rs2= x0 (coded),   rd = x0 (implicit)

   //   * JALR:   rs1= rs1(coded),     rs2= x0 (coded),   rd = x1 (implicit)

   //   * MV:     rs1= x0 (implicit),  rs2= rs2(coded),   rd = rd (coded)

   //   * ADD:    rs1= rs1(coded),     rs2= rs2(coded),   rd = rd (coded)

   //   * eBreak: rs1= rs1(coded),     rs2= x0 (coded),   rd = x0 (coded)

   wire rv16_need_cr_rs1   = rv16_format_cr & 1'b1;

   wire rv16_need_cr_rs2   = rv16_format_cr & 1'b1;

   wire rv16_need_cr_rd    = rv16_format_cr & 1'b1;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cr_rs1 = rv16_mv ? `E203_RFIDX_WIDTH'd0 : rv16_rs1[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cr_rs2 = rv16_rs2[`E203_RFIDX_WIDTH-1:0];

      // The JALR and JR difference in encoding is just the rv16_instr[12]

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cr_rd  = (rv16_jalr | rv16_jr)?

                  {{`E203_RFIDX_WIDTH-1{1'b0}},rv16_instr[12]} : rv16_rd[`E203_RFIDX_WIDTH-1:0];

   // In CI Cases:

   //   * LWSP:     rs1= x2 (implicit),  rd = rd

   //   * LI/LUI:   rs1= x0 (implicit),  rd = rd

   //   * ADDI:     rs1= rs1(implicit),  rd = rd

   //   * ADDI16SP: rs1= rs1(implicit),  rd = rd

   //   * SLLI:     rs1= rs1(implicit),  rd = rd

   wire rv16_need_ci_rs1   = rv16_format_ci & 1'b1;

   wire rv16_need_ci_rs2   = rv16_format_ci & 1'b0;

   wire rv16_need_ci_rd    = rv16_format_ci & 1'b1;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ci_rs1 = (rv16_lwsp | rv16_flwsp | rv16_fldsp) ? `E203_RFIDX_WIDTH'd2 :

                                   (rv16_li | rv16_lui) ? `E203_RFIDX_WIDTH'd0 : rv16_rs1[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ci_rs2 = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ci_rd  = rv16_rd[`E203_RFIDX_WIDTH-1:0];

   // In CSS Cases:

   //   * SWSP:     rs1 = x2 (implicit), rs2= rs2

   wire rv16_need_css_rs1  = rv16_format_css & 1'b1;

   wire rv16_need_css_rs2  = rv16_format_css & 1'b1;

   wire rv16_need_css_rd   = rv16_format_css & 1'b0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_css_rs1 = `E203_RFIDX_WIDTH'd2;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_css_rs2 = rv16_rs2[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_css_rd  = `E203_RFIDX_WIDTH'd0;

   // In CIW cases:

   //   * ADDI4SPN:   rdd = rdd, rss1= x2 (implicit)

   wire rv16_need_ciw_rss1 = rv16_format_ciw & 1'b1;

   wire rv16_need_ciw_rss2 = rv16_format_ciw & 1'b0;

   wire rv16_need_ciw_rdd  = rv16_format_ciw & 1'b1;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ciw_rss1  = `E203_RFIDX_WIDTH'd2;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ciw_rss2  = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_ciw_rdd  = rv16_rdd[`E203_RFIDX_WIDTH-1:0];

   // In CL cases:

   //   * LW:   rss1 = rss1, rdd= rdd

   wire rv16_need_cl_rss1  = rv16_format_cl & 1'b1;

   wire rv16_need_cl_rss2  = rv16_format_cl & 1'b0;

   wire rv16_need_cl_rdd   = rv16_format_cl & 1'b1;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cl_rss1 = rv16_rss1[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cl_rss2 = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cl_rdd  = rv16_rdd[`E203_RFIDX_WIDTH-1:0];

   // In CS cases:

   //   * SW:            rdd = none(implicit), rss1= rss1       , rss2=rss2

   //   * SUBXORORAND:   rdd = rss1,           rss1= rss1(coded), rss2=rss2

   wire rv16_need_cs_rss1  = rv16_format_cs & 1'b1;

   wire rv16_need_cs_rss2  = rv16_format_cs & 1'b1;

   wire rv16_need_cs_rdd   = rv16_format_cs & rv16_subxororand;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cs_rss1 = rv16_rss1[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cs_rss2 = rv16_rss2[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cs_rdd  = rv16_rss1[`E203_RFIDX_WIDTH-1:0];

   // In CB cases:

   //   * BEQ/BNE:            rdd = none(implicit), rss1= rss1, rss2=x0(implicit)

   //   * SRLI/SRAI/ANDI:     rdd = rss1          , rss1= rss1, rss2=none(implicit)

   wire rv16_need_cb_rss1  = rv16_format_cb & 1'b1;

   wire rv16_need_cb_rss2  = rv16_format_cb & (rv16_beqz | rv16_bnez);

   wire rv16_need_cb_rdd   = rv16_format_cb & (~(rv16_beqz | rv16_bnez));

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cb_rss1 = rv16_rss1[`E203_RFIDX_WIDTH-1:0];

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cb_rss2 = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cb_rdd  = rv16_rss1[`E203_RFIDX_WIDTH-1:0];

   // In CJ cases:

   //   * J:            rdd = x0(implicit)

   //   * JAL:          rdd = x1(implicit)

   wire rv16_need_cj_rss1  = rv16_format_cj & 1'b0;

   wire rv16_need_cj_rss2  = rv16_format_cj & 1'b0;

   wire rv16_need_cj_rdd   = rv16_format_cj & 1'b1;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cj_rss1 = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cj_rss2 = `E203_RFIDX_WIDTH'd0;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_cj_rdd  = rv16_j ? `E203_RFIDX_WIDTH'd0 : `E203_RFIDX_WIDTH'd1;

  // rv16_format_cr

   // rv16_format_ci

   // rv16_format_css

   // rv16_format_ciw

   // rv16_format_cl

   // rv16_format_cs

   // rv16_format_cb

   // rv16_format_cj

   wire rv16_need_rs1 = rv16_need_cr_rs1 | rv16_need_ci_rs1 | rv16_need_css_rs1;

   wire rv16_need_rs2 = rv16_need_cr_rs2 | rv16_need_ci_rs2 | rv16_need_css_rs2;

   wire rv16_need_rd  = rv16_need_cr_rd  | rv16_need_ci_rd  | rv16_need_css_rd;

  wire rv16_need_rss1 = rv16_need_ciw_rss1|rv16_need_cl_rss1|rv16_need_cs_rss1|rv16_need_cb_rss1|rv16_need_cj_rss1;

   wire rv16_need_rss2 = rv16_need_ciw_rss2|rv16_need_cl_rss2|rv16_need_cs_rss2|rv16_need_cb_rss2|rv16_need_cj_rss2;

   wire rv16_need_rdd  = rv16_need_ciw_rdd |rv16_need_cl_rdd |rv16_need_cs_rdd |rv16_need_cb_rdd |rv16_need_cj_rdd ;

  wire rv16_rs1en = (rv16_need_rs1 | rv16_need_rss1);

   wire rv16_rs2en = (rv16_need_rs2 | rv16_need_rss2);

   wire rv16_rden  = (rv16_need_rd  | rv16_need_rdd );

  wire [`E203_RFIDX_WIDTH-1:0] rv16_rs1idx;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_rs2idx;

   wire [`E203_RFIDX_WIDTH-1:0] rv16_rdidx ;

  assign rv16_rs1idx =

          ({`E203_RFIDX_WIDTH{rv16_need_cr_rs1 }} & rv16_cr_rs1)

        | ({`E203_RFIDX_WIDTH{rv16_need_ci_rs1 }} & rv16_ci_rs1)

        | ({`E203_RFIDX_WIDTH{rv16_need_css_rs1}} & rv16_css_rs1)

        | ({`E203_RFIDX_WIDTH{rv16_need_ciw_rss1}} & rv16_ciw_rss1)

        | ({`E203_RFIDX_WIDTH{rv16_need_cl_rss1}}  & rv16_cl_rss1)

        | ({`E203_RFIDX_WIDTH{rv16_need_cs_rss1}}  & rv16_cs_rss1)

        | ({`E203_RFIDX_WIDTH{rv16_need_cb_rss1}}  & rv16_cb_rss1)

        | ({`E203_RFIDX_WIDTH{rv16_need_cj_rss1}}  & rv16_cj_rss1)

        ;

  assign rv16_rs2idx =

          ({`E203_RFIDX_WIDTH{rv16_need_cr_rs2 }} & rv16_cr_rs2)

        | ({`E203_RFIDX_WIDTH{rv16_need_ci_rs2 }} & rv16_ci_rs2)

        | ({`E203_RFIDX_WIDTH{rv16_need_css_rs2}} & rv16_css_rs2)

        | ({`E203_RFIDX_WIDTH{rv16_need_ciw_rss2}} & rv16_ciw_rss2)

        | ({`E203_RFIDX_WIDTH{rv16_need_cl_rss2}}  & rv16_cl_rss2)

        | ({`E203_RFIDX_WIDTH{rv16_need_cs_rss2}}  & rv16_cs_rss2)

        | ({`E203_RFIDX_WIDTH{rv16_need_cb_rss2}}  & rv16_cb_rss2)

        | ({`E203_RFIDX_WIDTH{rv16_need_cj_rss2}}  & rv16_cj_rss2)

        ;

  assign rv16_rdidx =

          ({`E203_RFIDX_WIDTH{rv16_need_cr_rd }} & rv16_cr_rd)

        | ({`E203_RFIDX_WIDTH{rv16_need_ci_rd }} & rv16_ci_rd)

        | ({`E203_RFIDX_WIDTH{rv16_need_css_rd}} & rv16_css_rd)

        | ({`E203_RFIDX_WIDTH{rv16_need_ciw_rdd}} & rv16_ciw_rdd)

        | ({`E203_RFIDX_WIDTH{rv16_need_cl_rdd}}  & rv16_cl_rdd)

        | ({`E203_RFIDX_WIDTH{rv16_need_cs_rdd}}  & rv16_cs_rdd)

        | ({`E203_RFIDX_WIDTH{rv16_need_cb_rdd}}  & rv16_cb_rdd)

        | ({`E203_RFIDX_WIDTH{rv16_need_cj_rdd}}  & rv16_cj_rdd)

        ;

  assign dec_rs1idx = rv32 ? rv32_rs1[`E203_RFIDX_WIDTH-1:0] : rv16_rs1idx;

   assign dec_rs2idx = rv32 ? rv32_rs2[`E203_RFIDX_WIDTH-1:0] : rv16_rs2idx;

   assign dec_rdidx  = rv32 ? rv32_rd [`E203_RFIDX_WIDTH-1:0] : rv16_rdidx ;

   assign dec_rs1en = rv32 ? rv32_need_rs1 : (rv16_rs1en & (~(rv16_rs1idx == `E203_RFIDX_WIDTH'b0)));

   assign dec_rs2en = rv32 ? rv32_need_rs2 : (rv16_rs2en & (~(rv16_rs2idx == `E203_RFIDX_WIDTH'b0)));

   assign dec_rdwen = rv32 ? rv32_need_rd  : (rv16_rden  & (~(rv16_rdidx  == `E203_RFIDX_WIDTH'b0)));

  assign dec_rs1x0 = (dec_rs1idx == `E203_RFIDX_WIDTH'b0);

   assign dec_rs2x0 = (dec_rs2idx == `E203_RFIDX_WIDTH'b0);

   wire rv_index_ilgl;

   `ifdef E203_RFREG_NUM_IS_4 //{

   assign rv_index_ilgl =

                  (| dec_rs1idx[`E203_RFIDX_WIDTH-1:2])

                 |(| dec_rs2idx[`E203_RFIDX_WIDTH-1:2])

                 |(| dec_rdidx [`E203_RFIDX_WIDTH-1:2])

                 ;

   `endif//}

   `ifdef E203_RFREG_NUM_IS_8 //{

   assign rv_index_ilgl =

                  (| dec_rs1idx[`E203_RFIDX_WIDTH-1:3])

                 |(| dec_rs2idx[`E203_RFIDX_WIDTH-1:3])

                 |(| dec_rdidx [`E203_RFIDX_WIDTH-1:3])

                 ;

   `endif//}

   `ifdef E203_RFREG_NUM_IS_16 //{

   assign rv_index_ilgl =

                  (| dec_rs1idx[`E203_RFIDX_WIDTH-1:4])

                 |(| dec_rs2idx[`E203_RFIDX_WIDTH-1:4])

                 |(| dec_rdidx [`E203_RFIDX_WIDTH-1:4])

                 ;

   `endif//}

   `ifdef E203_RFREG_NUM_IS_32 //{

       //Never happen this illegal exception

   assign rv_index_ilgl = 1'b0;

   `endif//}

  assign dec_rv32 = rv32;

  assign dec_bjp_imm =

                      ({32{rv16_jal | rv16_j     }} & rv16_jjal_imm)

                    | ({32{rv16_jalr_mv_add      }} & rv16_jrjalr_imm)

                    | ({32{rv16_beqz | rv16_bnez }} & rv16_bxx_imm)

                    | ({32{rv32_jal              }} & rv32_jal_imm)

                    | ({32{rv32_jalr             }} & rv32_jalr_imm)

                    | ({32{rv32_branch           }} & rv32_bxx_imm)

                    ;

  assign dec_jalr_rs1idx = rv32 ? rv32_rs1[`E203_RFIDX_WIDTH-1:0] : rv16_rs1[`E203_RFIDX_WIDTH-1:0];

  assign dec_misalgn = i_misalgn;

   assign dec_buserr  = i_buserr ;

   assign dec_ilegl =

             (rv_all0s1s_ilgl)

           | (rv_index_ilgl)

           | (rv16_addi16sp_ilgl)

           | (rv16_addi4spn_ilgl)

           | (rv16_li_lui_ilgl)

           | (rv16_sxxi_shamt_ilgl)

           | (rv32_sxxi_shamt_ilgl)

           | (rv32_dret_ilgl)

           | (rv16_lwsp_ilgl)

           | (~legl_ops);

最新文章

1. PHP利用P3P实现跨域
2. android摇一摇实现(仿微信)
3. Something you need to perform after RedHat 6.x installed
4. Test Design Guidelines for Reusability
5. Codeforces Round #162 (Div. 2)
6. hive--UDF、UDAF
7. linux下的java远程调试jpda+tomcat
8. array_multisort 关联（string）键名保持不变，但数字键名会被重新索引。
9. Spring @Aspect实现切面编程
10. 『cURL』curl: (6) Could not resolve host无法解析主机地址
11. 2018 AI产业界大盘点
12. 37.Spring-事务控制.md
13. 向jsp中引入公共文件
14. php的session问题总结
15. 最强数据集50个最佳机器学习公共数据，可以帮你验证idea！
16. [转帖]UsingDiskspdforSQLServer --- 改天做下练习 官方文档.
17. eclipse ant 的自动部署(autobulid)
18. [ Office 365 开发系列 ] 身份认证
19. 剑指Offer——最小的K个数
20. Python Twisted系列教程20: Twisted和Erlang

热门文章

1. iOS----------苹果警告
2. swift（五）swift的函数
3. SparkSql 整合 Hive
4. django前奏
5. 5-2可视化库Seaborn-调色板
6. Jetbrain系列编辑器设置忽略目录(node_moudles)
7. 201871010111-刘佳华《面向对象程序设计（java）》第6-7周学习总结
8. 攻防世界pwn-Mary_Morton
9. [C3] 正则化(Regularization)
10. 《高性能MySQL》读后感——聚簇索引