VHDL之concurrent之operators

Using operators

　　Operators can be used to implement any combinational circuit. However, as will become apparent later, complex circuits are usually easier to write using sequential code, even if the circuit does not contain sequential logic.

Example　　Multiplexer　　

 ---------------------------------------

 LIBRARY ieee;

 USE ieee.std_logic_1164.all;

 ---------------------------------------

 ENTITY mux IS

 PORT ( a, b, c, d, s0, s1: IN STD_LOGIC;

 　　　　y: OUT STD_LOGIC);

 END mux;

 ---------------------------------------

  ARCHITECTURE pure_logic OF mux IS

  BEGIN

  　y <= (a AND NOT s1 AND NOT s0) OR

  　　　　(b AND NOT s1 AND s0) OR

  　　　　(c AND s1 AND NOT s0) OR

 　　　　 (d AND s1 AND s0);

  END pure_logic;

  ---------------------------------------

Miscellaneous operators

　　　　**　　　　Exponentiation

　　　　abs 　　Absolute value

　　The exponentiation operator has two operands. This operator is defined for any integer or floating point number. The right operand (exponent) must be of integer type. When the exponent is the positive integer, then the left operand is repeatedly multiplied by itself. When the exponent is the negative number, then the result is a reverse of exponentiation with the exponent equal to the absolute value of the right operand. If the exponent is equal to 0 the result will be 1.

　　The abs operator has only one operand. It allows defining the operand's absolute value. The result is of the same type as the operand.

2 **  =

3.8 **  = 54.872

 ** (-) =  / (**) = 0.0625

巴特西

VHDL之concurrent之operators

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